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Authors: S. Sackesyn, C. Ma, A. Katumba, J. Dambre, P. Bienstman
Title: A power-efficient architecture for on-chip reservoir computing
Format: International Conference Presentation
Publication date: 9/2019
Journal/Conference/Book: Artificial Neural Networks and Machine Learning ICANN 2019: Workshop and Special Sessions. ICANN 2019. Lecture Notes in Computer Science
Editor/Publisher: Springer, Cham, 
Volume(Issue): 11731 p.161-164
Location: Munchen, Germany
DOI: 10.1007/978-3-030-30493-5_16
Citations: 4 ( - last update: 9/6/2024)
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Reservoir computing is a neuromorphic computing paradigm
which is well suited for hardware implementations. In this work, an
enhanced reservoir architecture is introduced as to lower the losses
and improve mixing behaviour in silicon photonic reservoir computing

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