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Authors: W. Bogaerts, Y. Xing, Y. Ye, U. Khan, J. Dong, J. Geessels, M. Fiers, D. Spina, T. Dhaene
Title: Predicting Yield of Photonic Circuits With Wafer-scale Fabrication Variability
Format: International Conference Proceedings
Publication date: 5/2019
Journal/Conference/Book: 2019 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO) (invited)
Editor/Publisher: IEEE, 
Volume(Issue): p.1-3
Location: Boston, United States
DOI: 10.1109/NEMO.2019.8853660
Citations: Look up on Google Scholar
Download: Download this Publication (1MB) (1MB)


We present a workflow for variability analysis and yield prediction of photonic integrated circuits affected by fabrication variations. The technique combines synthetic wafer maps with layout-aware Monte-Carlo simulations. We demonstrate this on different layout configurations of linewidth-tolerant Mach-Zehnder interferometers.

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